EEPROM BIST stop address register
| STOPA | BIST stop address: Bit 0 is fixed zero since only even addresses are allowed. |
| RESERVED | Reserved |
| DEVSEL | BIST device select bit 0: the BIST signature is generated over the total memory space. Singe pages are interleaved over the EEPROM devices when multiple devices are used, the signature is generated over memory of multiple devices. 1: the BIST signature is generated only over a memory range located on a single EEPROM device. Therefore the internal address generation is done such that the address’ CS bits are kept stable to select only the same device. The address’ MSB and LSB bits are used to step through the memory range specified by the start and stop address fields. Note: if this bit is set the start and stop address fields must be programmed such that they both address the same EEPROM device. Therefore the address’ CS bits in both the start and stop address must be the same. |
| STRTBIST | BIST start bit Setting this bit will start the BIST. This bit is self-clearing. |